-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Aug  5 23:24:36 2024 UTC
-- File 20240704_025345_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-07-04T02:53:48.000.000.000 to 2024-07-04T02:53:48.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240704_025345_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0176A480 01CDF6C0 012B0DA0 03BE8B70 0261CEC0 035129A0 00F9BD70 008563C0 00C7D220 02A43B30 03FB1350
      03FB1350 00069AF0 0005D780 00073C40 0004A260 0206F350 01058AF0 01874F80 0144E840 01E69C60 038AE920
      038AE920 0027CED0 023429B0 032E3D60 00B923D0 02E5B230 03976B20 005CDEB0 0072B1E0 024BE910 016E1D90
      016E1D90 03EC89A0 000D66B0 000BD5E0 020E3F10 01092090 038DB0D0 004B68B0 006EDCE0 0259B290 01756BD0
      01756BD0 03CFDE30 03141890 024F0A60 01688F50 03DCC8F0 0232AC80 032BFAC0 02BE07A0 01E10470 01118640
      01118640 01994560 0355E7D0 007F8A10 03202780 02B03440 03E82E60 001C3950 021225F0 031B3700 0296AC80
      0296AC80 03DDFAC0 023307A0 012A8470 00DFE320 01580950 03F40DF0 020E0B00 03090E80 028D89C0 03CB4D20
      03CB4D20 002EEBB0 00399E60 02255150 0137F9F0 00D60280 005E81E0 0271C110 01492190 03EDB150 001B69F0
      001B69F0 0016DD00 001DB380 00136A40 001ADF60 0217B0D0 008E3450 01649730 01D6DCA0 033DB2F0 02A36B80
      02A36B80 03F2DE40 020BB160
     
