-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Aug  5 23:13:21 2024 UTC
-- File 20240703_162827_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-07-03T16:28:30.000.000.000 to 2024-07-03T16:28:30.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240703_162827_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00C77610 02A4CD10 01F6AB90 030DFE50 008B0170 00CE81C0 00A9C120 02FD21B0 0383B160 004269D0 02635D30
      02635D30 0352F3A0 00FB8A70 00864F40 00C568E0 02A7DC90 02FA1960 018715D0 03449F30 02E6D0A0 0195B8F0
      0195B8F0 015F6480 01F0D6C0 0108BDA0 038CE370 024A92C0 03B7EDD0 00360D90 022D0B50 013B8EF0 01A64980
      01A64980 01756D40 01CFDBE0 03283610 00BC2D10 02E23B90 01932650 01AD5AB0 02BDFBF0 03E30600 02128500
      02128500 031BC780 02962440 03DD3660 0033AD50 022A7BF0 033F4600 02A0E500 01F84BC0 02823710 01C32C90
      01C32C90 0322BAD0 00B3E7B0 00EA1460 029F1E50 01D09170 0138D9C0 01A4B520 0376EFB0 0366CC30 036AD510
      036AD510 00DFBF90 02B06050 01E85070 011C7840 01924460 035B6650 00F6D570 008DBFC0 00CB6020 01576810
      01576810 03FE6E00 02015900 0301F580 02810F40 03C188E0 00214C90 0231EAD0 01291FB0 01BD9060 03635850
      03635850 00697A30 022EE390 01399250 03A55B70 0277F6C0 034C0DA0 00EA0B70 009F0EC0 00D089A0 02B8CD70
      02B8CD70 03E4ABC0 030B7F10
     
