-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Aug  5 21:45:54 2024 UTC
-- File 20240630_195919_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-06-30T19:59:22.000.000.000 to 2024-06-30T19:59:22.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240630_195919_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03880AA0 004C0FF0 006A0800 005F0C00 00708A00 0048CF00 006CA880 005AFCC0 007782A0 024C43F0 036A6200
      036A6200 02DF5300 03B0FA80 026887C0 035CC420 00F2A630 0245FA90 016707D0 03D48430 023EC620 0121A530
      0121A530 01B177A0 0369CC70 02DD2A40 03B3BF60 006A60D0 012FA850 01DC3E30 01322120 03AB31B0 027EA960
      027EA960 0141FDD0 03E10330 021182A0 011943F0 0195E200 015F1300 00F84D40 024235F0 03632F00 02D2B880
      02D2B880 03BBE4C0 026616A0 01551DF0 01FF9300 01005A80 018077C0 01404C20 01F03510 038417C0 02461C20
      02461C20 01651230 01D79B20 033C56B0 02A27DE0 01F34310 030AE290 008F93D0 02C85A30 03D63B90 021E9320
      021E9320 0111DAB0 019937E0 0355AC10 00FF7A10 0280C710 01C0A490 0320F6D0 00B08DB0 00E8CB60 034E5760
      034E5760 0274BE60 014EE150 03E991F0 021D5900 0313F580 029A0F40 03D708E0 003C8C90 0222CAD0 0133AFB0
      0133AFB0 02D53C30 03DFD110 00303990 02282550 013C37F0 01A22C00 01733A00 01CAA700 012FF480 01B80EC0
      01B80EC0 016409A0 01EB06B0
     
