-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Aug  5 16:39:24 2024 UTC
-- File 20240621_034308_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-06-21T03:43:11.000.000.000 to 2024-06-21T03:43:11.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240621_034308_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00C5B260 02A76B50 01F4DEF0 008758C0 02627A50 00A9A3B0 027EB930 03A0F2D0 00708BB0 0048CE60 026CA950
      026CA950 015AFDF0 01F78300 010C4280 018A63C0 014F5220 03E8FB30 030E4350 0044B170 0066E9C0 00559D20
      00559D20 027F53B0 0340FA60 00E08750 0290C4F0 03D8A680 0234F5C0 032E8F20 005CE450 01394B30 01A5EEA0
      01A5EEA0 037719F0 02CC9500 03AADF80 027FB040 03406860 00E05C50 02907270 03D84B40 031A3770 014B9660
      014B9660 03EE5D50 001973F0 0015CA00 001F2F00 0010B880 0018E4C0 001496A0 021EDDF0 0311B300 014CB540
      014CB540 02F577F0 038FCC00 02482A00 036C3F00 02DA2080 03B730C0 026CA8A0 015AFCF0 01F78280 010C43C0
      010C43C0 02C53110 02D3D4C0 03BA3EA0 006721F0 0054B100 007EE980 00419D40 006153E0 0251FA10 01790710
      01790710 03C58490 0213A360 028D3960 01CBA5D0 032E7730 02B94CA0 01E5EAF0 01171F80 019C9040 0152D860
      0152D860 03FBB450 00066E70 0002ACA0 0101FD70 018103C0 01418220 03E14330 0211E2A0 011913F0 01959A00
      01959A00 015F5700 01F0FC80
     
