-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Aug  5 11:39:06 2024 UTC
-- File 20240612_001226_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-06-12T00:12:29.000.000.000 to 2024-06-12T00:12:29.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240612_001226_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00C67E40 00A54160 02F7E1D0 018C1130 014A19A0 03EF1570 02189FC0 0314D020 009EB830 00D1E420 02B91630
      02B91630 03E59D20 001753B0 001CFA60 030943A0 008DE270 00CB1340 00AE9AE0 02F9D790 01853C50 0347A270
      0347A270 02E47340 03964AE0 005D6F90 0339EC20 00528D10 027BCB90 01462E50 03E53970 0217A5C0 031C7720
      031C7720 00924CB0 00DB6AE0 02B6DF90 01EDB050 018DB430 02A5B710 01F76C90 030CDAD0 008AB7B0 00CFEC60
      00CFEC60 02A81A50 01FC1770 01021CC0 018312A0 03429BF0 0171EB00 00E48F40 0096C8E0 02DDAC90 01B37AD0
      01B37AD0 036AC7B0 02DFA460 01B07650 03684D70 02DC6BC0 03B25E20 0035B890 0317B260 009C6B50 02D25EF0
      02D25EF0 03BB7180 0266C940 0355ADE0 00FF7B10 0280C690 01C0A5D0 0320F730 03584650 007A32B0 00472BE0
      00472BE0 0264BE10 0156E110 03FD9190 00035950 0202F5F0 03038F00 02824880 03C36CC0 03116D50 004CEDF0
      004CEDF0 006A9B00 005FD680 00703DC0 00482320 026C32B0 035A2BE0 00F73E10 028CA110 01CAF190 0397C4A0
      0397C4A0 002E1370 00391AC0
     
