-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Jul 26 07:11:11 2024 UTC
-- File 20240606_141726_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-06-06T14:17:29.000.000.000 to 2024-06-06T14:17:29.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240606_141726_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  005A80A0 0277C0F0 034C2080 02EA30C0 039F28A0 0050BCF0 0078E280 004493C0 0066DA20 0255B730 037F6CA0
      037F6CA0 00C0DAF0 00505BC0 00787620 02444D30 03666BA0 00D55E70 00BFF140 00E009E0 02900D10 01D80B90
      01D80B90 03340E50 005704B0 023E4370 032162C0 02B1D3A0 01E93A70 011DA740 019374E0 035ACE90 00F7A9D0
      00F7A9D0 028C7D30 03CA43A0 0017B130 020E34D0 01092EB0 018DB9E0 034B6510 00EED790 0299BC50 01D56270
      01D56270 013FD340 01A03AE0 03702790 02641A20 00AB0B90 02FE8E50 0181C970 01412DC0 01E1BB20 031166B0
      031166B0 0299D5E0 01D53F10 033FA090 00A070D0 01782450 01E21B30 011316A0 039A9DF0 0257D300 037C3A80
      037C3A80 02C227C0 03A33420 0072AE30 004BF920 026E05B0 03AC83B0 033D6130 02A3D1A0 01F23970 010B25C0
      010B25C0 018EB720 0349ECB0 02ED1AE0 019B9790 03565C50 00FD7270 0041E5A0 01308BB0 01A8CE60 037CA950
      037CA950 00C2FDF0 00A38300 00F24280 008B63C0 00CED220 02A9BB30 03FD66A0 0001EAF0 00008FC0 0000C820
      0000C820 0200AC30 0300FA20
     
