-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed May 29 00:02:03 2024 UTC
-- File 20240528_234342_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-28T23:43:45.000.000.000 to 2024-05-28T23:43:45.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240528_234342_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  029A5A20 00EBBB90 034F3320 00745550 01273FF0 00DA5000 00B77800 00ECC400 009AA600 00D7F500 00BC0F80
      00BC0F80 00E20840 00930C60 02DA8A50 01B7CF70 00B61460 03768F20 00CDC8B0 00AB2CE0 02FEBA90 0181E7D0
      0181E7D0 03411430 02E19E20 01915130 0159F9A0 03F50570 0107C3E0 03C21100 02231980 03329540 02ABDFE0
      02ABDFE0 01FE3010 03012810 0081BC10 02C16210 01A1D310 03713A90 0264D3E0 02AB5D00 03FEF380 02018A40
      02018A40 03014F60 0081E8D0 02C11CB0 03A192E0 00715B90 0249F650 016D0D70 00EDC5E0 034D9380 02EB5A40
      02EB5A40 039EF760 00518CD0 02794AB0 0345EFE0 00E71810 02949410 01DEDE10 0331B110 0254B4C0 03BF7750
      03BF7750 0060CCF0 0050AA80 0078FFC0 00448020 0266C030 0355A020 00FF7030 0080C820 02C0AC30 03D07D10
      03D07D10 021C21C0 03123120 009B29B0 00D6BD60 02BDE3D0 01E31230 01129B20 039BD6B0 02563DE0 017D2310
      017D2310 03E1D940 03089AF0 028CD780 03CABC40 022FE260 01381350 03A41AF0 02761780 034D1C40 02EB9260
      02EB9260 019E5B50 01A8BB70
     
