-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue May 28 23:26:39 2024 UTC
-- File 20240528_205442_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-28T20:54:45.000.000.000 to 2024-05-28T20:54:45.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240528_205442_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02265CC0 033572A0 00AFCBF0 00F82E00 00843900 00C62580 00A53740 00F7ACE0 028C7A90 01CA47D0 032F6430
      032F6430 02B8D620 01E4BD30 028B71D0 01CEC930 0129ADA0 03BD7B70 0263C6C0 035225A0 00FB3770 0086ACC0
      0086ACC0 00C5FAA0 02A707F0 01FA4200 0083B180 00C26940 00A35DE0 02F2F310 018B8A90 034E4FD0 00E96830
      00E96830 009DDC20 02D33230 03BAAB20 0033FF50 01150070 019F8040 01504060 03F86050 00045070 00067840
      00067840 00054460 0207E650 01041570 01861FC0 02A28810 02F9E600 03851500 02479F80 03645040 02D67860
      02D67860 01BD4450 0363E670 02D21540 03BB1FE0 00669010 032AEC00 015FCD00 01F02B80 01083E40 018C2160
      018C2160 034A31D0 00EF2930 0098BDA0 02D4E370 03BE92C0 0261DBA0 00A89B30 027E6B50 01415EF0 01E1F180
      01E1F180 01110940 01998DE0 03554B10 00FFEE90 028019D0 01C01530 01201FA0 01D80830 029A0610 01D70510
      01D70510 033C8790 00A2C450 02F3A670 038A7540 024F4FE0 0168E810 03DC9C10 0032D210 0315DD80 014F99A0
      014F99A0 03E85570 021C7FC0
     
