-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue May 28 23:03:47 2024 UTC
-- File 20240528_040014_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-28T04:00:17.000.000.000 to 2024-05-28T04:00:17.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240528_040014_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0015D090 021F38D0 0110A4B0 0198F6E0 03AA46C0 033FB2D0 005035D0 013C1790 03A21C50 00731270 004A9B40
      004A9B40 006FD6E0 02583D90 01742350 03CE32F0 02292B80 033DBE40 0351B0B0 037CB470 02C2EE40 03A39960
      03A39960 007255D0 024B7F30 036EC0A0 00D9A0F0 00B57080 00EFC8C0 00982CA0 016A1D70 00EF89E0 02984D10
      02984D10 01D46B90 033E5E50 00A17170 00F1C9C0 00892D20 02CDBBB0 03AB6660 007ED550 0120DFF0 00D85800
      00D85800 00B47400 00EE4E00 00996900 00D5DD80 00BF3340 00E0AAE0 0290FF90 01D88050 0334C070 01575020
      01575020 01FE7C10 03014210 0081E310 02C11290 01A19BD0 03715630 02C9FD20 01AD03B0 017B8260 03C64350
      03C64350 0012B170 000DF4E0 020B0E90 010E89D0 0389CD30 024D2BA0 016BBE70 01DE6140 013151E0 03A9F910
      03A9F910 007D0590 0321C3A0 00589130 0074D9A0 024EB570 0369EFC0 02DD1820 01B39430 016A5E20 03DF7130
      03DF7130 0230C9A0 0128AD70 00DE7DE0 0358A180 02F4F140 038E89E0 0049CD10 026D2B90 015BBE50 03F66170
      03F66170 020D51C0 030BF920
     
