-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue May 28 01:45:41 2024 UTC
-- File 20240528_012809_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-28T01:28:12.000.000.000 to 2024-05-28T01:28:12.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240528_012809_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03376F60 00ACD8D0 02FAB4B0 0387EEE0 02220CC0 03998550 002AA3F0 001FF900 00100580 00180740 001404E0
      001404E0 021E0690 011105D0 03998730 025544A0 017FE6F0 01C01580 00900FA0 016C0430 01DA0620 03370530
      03370530 02AC87A0 01FAC470 0107A640 01847560 03464FD0 00E56830 0097DC20 016E1910 03EC8AC0 021ACFA0
      021ACFA0 0117A870 019C7C40 01524260 03FB6350 0006D2F0 0005BB80 00076640 0004D560 03035FE0 02417800
      02417800 0361C400 02D12600 03B9B500 02656F80 0357D840 02FC3460 01822E50 03433970 02E2A5C0 03C9FB90
      03C9FB90 02168320 011DC2B0 019323E0 035AB210 00F7EB10 028C1E90 01CA11D0 032F1930 02B895A0 01E4DF70
      01E4DF70 008B5860 03677A20 00D4C730 00BEA4A0 02E1F6F0 03910D80 02598B40 03754EE0 00CFE990 02A81D50
      02A81D50 01FC13F0 00810D00 0060C5C0 0050A720 0278F4B0 03448EE0 00E6C990 0295AD50 01DF7BF0 0130C600
      0130C600 01A8A500 017CF780 00E14620 0148F290 03EC8BD0 001ACE30 0017A920 021C7DB0 03124360 009B62D0
      009B62D0 02D6D3B0 03BDBA60
     
