-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun May 26 23:29:44 2024 UTC
-- File 20240526_215114_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-26T21:51:17.000.000.000 to 2024-05-26T21:51:17.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240526_215114_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00115130 0019F9A0 02150570 031F87C0 02904420 01D86630 01345520 01D73FD0 019E5010 03517810 00F9C410
      00F9C410 02852610 01C7B510 03246F90 00B65850 02ED7470 039BCE40 02562960 02BE9EE0 02F0E8C0 03889CA0
      03889CA0 004CD2F0 006ABB80 005FE640 00701560 02481FD0 016C1030 01DA1820 03371430 03564F10 027EB440
      027EB440 0341EE60 00E11950 029195F0 03D95F00 0235F080 032F08C0 02B88CA0 01E4CAF0 0116AF80 00CEFC20
      00CEFC20 0154C110 03FEA190 0001F150 020109F0 03018D00 02814B80 03C1EE40 02211960 013195D0 03A95F30
      03A95F30 033EF850 0050C230 0078A320 0244F2B0 03668BE0 00D5CE10 02BF2910 01E0BD90 0310E350 009892F0
      009892F0 00D4DB80 005F5B20 01387B50 03A446F0 02766580 034D5740 02EBFCE0 019E0290 035103D0 00F98230
      00F98230 00854320 02C7E2B0 03D209F0 011D8680 019345C0 015AE720 03F794B0 020C5EE0 010A7190 038F4950
      038F4950 0048EDF0 006C9B00 005AD680 003BDEE0 031318C0 029A94A0 01D7DEF0 013C3180 01A22940 01733DE0
      01733DE0 03CAA310 002FF290
     
