-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun May 26 23:28:51 2024 UTC
-- File 20240526_211724_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-26T21:17:27.000.000.000 to 2024-05-26T21:17:27.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240526_211724_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00566BF0 007D5E00 0043F100 00620980 00530D40 023D45F0 0191F380 01590A40 01F58F60 030F48D0 0088ECB0
      0088ECB0 00CC9AE0 02AAD790 01FFBC50 03006270 02805340 03E03D70 010811E0 038C1910 004A1590 026F1F50
      026F1F50 015890F0 01F4D880 010EB4C0 0189EEA0 034D19F0 02EB9500 01CF2FC0 02945C10 01DE7210 03314B10
      03314B10 00A9EE90 02FD19D0 01839530 01425FA0 03E37070 0212C840 031BAC60 024B3D20 00B751D0 02ECF930
      02ECF930 039A85A0 0057C770 007C24C0 004236A0 02632DF0 0352BB00 02FBE680 038615C0 03228F90 0259E420
      0259E420 01751630 01CF9D20 032853B0 02BC7A60 01E24750 031364F0 029AD680 03D7BDC0 023C6320 00912950
      00912950 016CDEF0 01DAB180 0137E940 01AC1DE0 037A1310 00C71A90 02A497D0 01F6DC30 010DB220 038B6B30
      038B6B30 03276F50 005A6C70 00775A40 004CF760 026A8CD0 015FCAB0 01F02FE0 03083810 008C2410 02CA3610
      02CA3610 01AF2D10 03BC5DC0 03313990 00A9A550 02FD77F0 0383CC00 02422A00 03633F00 02D2A080 03BBF0C0
      03BBF0C0 026608A0 01550CF0
     
