-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun May 26 23:13:23 2024 UTC
-- File 20240526_103454_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-26T10:34:57.000.000.000 to 2024-05-26T10:34:57.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240526_103454_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  007EC360 0241A2D0 016173B0 01D1CA60 03392F50 00A5B8F0 00F76480 00466B60 0332AF60 0255FC60 02BF8120
      02BF8120 01E041B0 01106160 039851D0 00547930 007E45A0 02416770 0361D4C0 02D13EA0 01B9A1F0 00B2B880
      00B2B880 0075F260 024F0B50 01688EF0 01DCC980 0132AD40 01ABFBE0 037E0610 00C10510 02A18790 01F14450
      01F14450 0184F330 02A34550 01F2E7F0 010B9400 018E5E00 01497100 01EDC980 011B2D40 0196BBE0 035DE610
      035DE610 00F31510 03454FC0 0373F410 00CA0E10 02AF0910 01F88D90 0304CB50 0086AEF0 00C5F980 00A70540
      00A70540 00F487E0 028EC410 02E4D300 01CB5D40 012EF3E0 03B98A10 00654F10 0257E890 017C1CD0 03C212B0
      03C212B0 02231BE0 01329610 03ABDD10 023F19C0 03904A90 00586FD0 02745830 034E7420 00E94E30 009DE920
      009DE920 02D31DB0 03BA9360 0067DAD0 025437B0 03BF1630 03304E90 00A869D0 02FC5D30 038273A0 00434A70
      00434A70 0062EF40 005398E0 027A5490 01477ED0 03E4C1B0 030B50B0 03477C70 02E4C240 0396A360 005DF2D0
      005DF2D0 02730BB0 034A8E60
     
