-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun May 26 23:05:40 2024 UTC
-- File 20240526_053034_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-26T05:30:37.000.000.000 to 2024-05-26T05:30:37.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240526_053034_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03ACF770 027A8CC0 0347CAA0 00E42FF0 004B1C00 00374900 002CED80 003A9B40 0027D6E0 02343D90 012E2350
      012E2350 03B932F0 0265AB80 03577E40 02FCC160 02C150E0 02D0FC40 03B88260 0064C350 0256A2F0 037DF380
      037DF380 02C30A40 03A28F60 0073C8D0 024A2CB0 036F3AE0 026C53C0 03AD3D10 007BA390 02467250 01654B70
      01654B70 01D7EEC0 013C19A0 03A21570 02731FC0 034A9020 00EFD830 024C1A10 02B50B80 03EF8E40 02184960
      02184960 01146DD0 039E5B30 025176A0 0179CDF0 01C52B00 0127BE80 01B461C0 02B72890 02F65E60 018D7150
      018D7150 034BC9F0 02EE2D00 03993B80 0255A640 037F7560 00C0CFD0 02A0A830 03F0FC20 00044110 030330C0
      030330C0 0282A8A0 01C3FCF0 01220280 01B303C0 016A8220 03DFC330 023022A0 012833F0 01BC2A00 00B11F80
      00B11F80 0074C820 024EAC30 0369FA20 00DD0730 00B384A0 02EA46F0 039F6580 0250D740 0378BCE0 00C4E290
      00C4E290 035349E0 027D7680 0343CDC0 02E22B20 01933EB0 015AA1E0 03F7F110 000C0990 020A0D50 010F0BF0
      010F0BF0 01888E00 00A66480
     
