-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun May 26 23:02:58 2024 UTC
-- File 20240526_033214_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-26T03:32:17.000.000.000 to 2024-05-26T03:32:17.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240526_033214_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02F7B800 038C6400 024A5600 036F7D00 02D8C380 03B4A240 026EF360 01598AD0 03F54FB0 020FE860 01081C50
      01081C50 038C1270 01250DA0 03B78B70 026C4EC0 035A69A0 00F75D70 008CF3C0 00CA8A20 02AFCF30 03F828A0
      03F828A0 00043CF0 00031140 02014CF0 0301EA80 02811FC0 03C19020 00215830 0031F420 02290E30 033D8920
      033D8920 00A34DB0 00F2EB60 0345CF60 02739460 014A5E50 03EF7170 0218C9C0 0314AD20 009EFBB0 00D18660
      00D18660 02B94550 01E5E7F0 01171400 00CE4F00 0054B440 007EEE60 02419950 016155F0 01D1FF00 01390080
      01390080 01A580C0 017740A0 03CCE0F0 022A9080 019FEC60 03A80D20 007C0BB0 00420E60 02630950 01528DF0
      01528DF0 01FBCB00 01062E80 018539C0 0147A520 03E477B0 030B2630 03475A90 00E4F7D0 02968C30 03DDCA20
      03DDCA20 00332F30 002AB8A0 023FE4F0 03201680 02B01DC0 03E81320 000E0D50 010485F0 0186C700 0145A480
      0145A480 01E776C0 0114CDA0 039EAB70 0251FEC0 037901A0 00C58170 00A741C0 027A7090 02A3A460 01F27650
      01F27650 030B4D70 028EEBC0
     
