-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat May 25 23:28:46 2024 UTC
-- File 20240525_222759_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-25T22:28:02.000.000.000 to 2024-05-25T22:28:02.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240525_222759_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0082AAA0 02C3FFF0 03A20000 02730000 01A54000 00BBF000 00E60800 00950C00 00DF8A00 00B04F00 00E86880
      00E86880 009C5CC0 00D272A0 02BB4BF0 03E6EE00 010ACC80 00C7D560 02A43FD0 01F62030 010D3020 038BA830
      038BA830 024E7C20 01694230 01DDE320 033312B0 02AA9BE0 02FFEB00 01C00F40 012008E0 03B00C90 00680AD0
      00680AD0 025C0FB0 03720860 00CB0C50 02AE8A70 03F9CF40 020528E0 0283DE40 03E118B0 021194E0 01195E90
      01195E90 0395F1D0 005F0930 00708DA0 0248CB70 036CAEC0 02DAF9A0 01B78570 00B623E0 03769900 02CDD580
      02CDD580 03AB3F40 027EA0E0 0141F090 03E108D0 00118CB0 00194AE0 0215EF90 011F1850 01C84A30 02963790
      02963790 01DD2C50 0333BA70 02AA6740 03FF54E0 0000FE90 020081D0 0100C130 0180A1A0 0340F170 017044E0
      017044E0 03E43340 02162AE0 011D3F90 0393A050 005A7070 00774840 004CEC60 026A9A50 015FD770 01F03CC0
      01F03CC0 02841150 00E30CF0 00928A80 00DBCFC0 00B62820 02ED3C30 039BA220 00567330 007D4AA0 0243EFF0
      0243EFF0 03621800 01698A00
     
