-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat May 25 23:17:23 2024 UTC
-- File 20240525_134404_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-25T13:44:07.000.000.000 to 2024-05-25T13:44:07.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240525_134404_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03445770 01733E60 03CAA150 002FF1F0 00380900 00240D80 00360B40 002D0EE0 023B8990 01264D50 03B56BF0
      03B56BF0 0137EF00 00D60C40 00BD0A60 02E38F50 019248F0 015B6C80 01F6DAC0 010DB7A0 038B6C70 024EDA40
      024EDA40 0369B760 026EB660 02ACF6A0 01FA8DF0 0107CB00 01842E80 014639C0 01E52520 0317B7B0 029C6C60
      029C6C60 01D25A50 033B7770 01536660 03FD6AA0 0003DFF0 00023000 00032800 0002BC00 0003E200 00021300
      00021300 00031A80 000297C0 0003DC20 01011910 03C0CAC0 0220AFA0 0130F870 01A88440 017CC660 03C2A550
      03C2A550 0023F7F0 00320C00 002B0A00 003E8F00 0010E440 020C4B30 030A6EA0 008F59F0 00C8F500 00AC8F80
      00AC8F80 00FAC840 0087AC60 02C47A50 01A64770 017564C0 02E7EB50 00CA0F70 00AF08C0 00F88CA0 0284CAF0
      0284CAF0 03C6AF80 0225F840 03370460 00AC8650 02FAC570 0387A7C0 03223A10 02599380 03755A40 02CFF760
      02CFF760 01A80CD0 037C0AB0 02C20FE0 01A30810 03728C10 00CBCA10 02AE2F10 02FC9C40 03C16930 0221DDA0
      0221DDA0 01313370 01A9AAC0
     
