-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat May 25 23:08:05 2024 UTC
-- File 20240525_064128_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-25T06:41:31.000.000.000 to 2024-05-25T06:41:31.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240525_064128_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02C3EF10 01A21890 037314D0 00654F50 012BF470 00DF0720 01584250 01FA31B0 01072960 0384BDD0 0046E330
      0046E330 006592A0 02575BF0 037CF600 02C28D00 03A3CB80 02722E40 03A59CB0 033BA970 02A67DC0 03F54320
      03F54320 000FE2B0 000813E0 020C1A10 010A1710 038F1C90 004892D0 026CDBB0 03AD5B30 033DFB50 00A306F0
      00A306F0 00F28580 008BC740 00CE24E0 02A93690 01FDADD0 03037B30 0282C6A0 01C3A5F0 00913B80 006CD320
      006CD320 025ABAB0 0377E7E0 00CC1410 02AA1E10 01FF1110 03009990 0080D550 02C0BFF0 03A0E000 01384800
      01384800 00D23600 00BB2D00 00E6BB80 0095E640 00DF1560 02B09FD0 01E8D030 011CB820 0392E430 025B9620
      025B9620 00BB2E90 03735CE0 00CAF290 02AF8BD0 01F84E30 01046920 03865DB0 02457360 0167CAD0 03D42FB0
      03D42FB0 023E3860 02909220 00EC6D90 029A5B50 01D776F0 013CCD80 01A2AB40 0173FEE0 03CA0190 002F0150
      002F0150 023881F0 0324C100 015B50C0 02FB7C50 0186C270 0145A340 01E772E0 0314CB90 009EAE50 02D1F970
      02D1F970 03B905C0 02658720
     
