-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed May 22 23:13:22 2024 UTC
-- File 20240522_110308_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-22T11:03:11.000.000.000 to 2024-05-22T11:03:11.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240522_110308_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03B2CC80 026BAAC0 035E7FA0 00F14070 0089E040 02668830 03AAE610 023FCA80 019017E0 03AC0E00 027A0900
      027A0900 03470D80 02E48B40 0396CEE0 005DA990 02737D50 014AC3F0 01EFA200 01187300 00CA2540 02579BF0
      02579BF0 037C5600 02C27D00 03A34380 0272E240 034B9360 00EE5AD0 029977B0 03D5CC60 003F2A50 01105FB0
      01105FB0 02CC3830 03AA2420 007F3630 0040AD20 0260FBB0 03508660 00F8C550 0284A7F0 03C6F400 02258E00
      02258E00 019BA480 00AB3B60 02FEA6D0 0181F5B0 01410F60 03E188D0 00114CB0 0019EAE0 02151F90 011F9050
      011F9050 03905870 012C3A20 01DD1390 03339A50 00AA5770 00FF7CC0 0080C2A0 02C0A3F0 03A0F200 02708B00
      02708B00 0348CE80 02ECA9C0 03CD7E90 0215E0E0 011F1090 039098D0 0058D4B0 0074BEE0 024EE190 01699150
      01699150 03DD59F0 0233F500 032A0F80 015F8420 01F82310 03043290 00862BD0 02C53E30 03A7A120 007471B0
      007471B0 004E4960 02696DD0 015DDB30 01F336A0 018556F0 00A3FEC0 00F201A0 028B0170 03CE81C0 0229C120
      0229C120 013D21B0 01A3B160
     
