-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed May 22 23:02:44 2024 UTC
-- File 20240522_030944_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-22T03:09:47.000.000.000 to 2024-05-22T03:09:47.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240522_030944_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03DC0010 00320010 022B0010 013E8010 03A1C010 00712010 0249B010 016D6810 03DBDC10 00363210 022D2B10
      022D2B10 029DDF40 03E99870 021D5440 0313FE60 009A0150 02D701F0 03BC8100 0262C180 0353A140 02FA71E0
      02FA71E0 01874910 03A276C0 0339A6D0 00A575B0 00F7CF60 028C28D0 01CA3CB0 012F22E0 03B8B390 0064EA50
      0064EA50 02569F70 037DD0C0 03619C50 0068A930 005CFDA0 02728370 034BC2C0 02EE23A0 01993270 0155AB40
      0155AB40 01FF7EE0 0300C190 0080A150 016078F0 00E82240 009C3360 02D22AD0 01BB3FB0 0166A060 03D5F050
      03D5F050 003F0870 00208C40 0030CA60 0228AF50 009E7C70 0068A120 025CF1B0 03728960 00CBCDD0 02AE2B30
      02AE2B30 03F93EA0 0005A1F0 00077100 0004C980 0006AD40 0202FDF0 0181C180 01412140 01E1B1E0 03116910
      03116910 0099DD90 02D53350 01BFAAF0 01607F80 01D04040 01386060 03D22820 001D9E10 02135110 011AF990
      011AF990 03978550 005C47F0 00726400 004B5600 006EFD00 00598380 00754240 0227F1B0 039A04B0 025706E0
      025706E0 017C8590 03C2C750
     
