-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu May 16 23:07:14 2024 UTC
-- File 20240516_061230_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-16T06:12:33.000.000.000 to 2024-05-16T06:12:33.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240516_061230_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03C98F40 022D48E0 013BEC90 03D30D60 021D45E0 0113E710 039A1490 00571ED0 027C91B0 0342D960 00E3B5D0
      00E3B5D0 02926F30 03DB58A0 0036F4F0 0016C740 020ED270 0309BB40 028D66E0 01CBD590 032E3F50 00B920F0
      00B920F0 00E5B080 009768C0 00DCDCA0 02B2B2F0 01F5F5C0 02878790 01C44450 03266670 02B55540 03EFFFE0
      03EFFFE0 00180010 02140010 011E0010 03910010 00598010 033AA000 0153F800 01FA0400 01070600 01848500
      01848500 0146C780 01E5A440 01177660 039CCD50 0052ABF0 007BFE00 00230080 00194060 0215E050 011F1070
      011F1070 01909840 0158D460 03F4BE50 000EE170 000991C0 000D5920 020BF5B0 038707B0 03224230 02B36320
      02B36320 01EAD2B0 011FBBE0 03906610 00585510 02747F90 014E4050 03E96070 021DD040 03899C30 0326A910
      0326A910 00B5FD90 02EF0350 019882F0 0154C380 01FEA240 0101F360 03810AD0 00418FB0 00614860 0328F620
      0328F620 005E4690 027165D0 0149D730 01ED3CA0 031BA2F0 02967380 03DD4A40 0233EF60 012A18D0 03BF14B0
      03BF14B0 03304F70 01543460
     
