-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu May 16 23:04:49 2024 UTC
-- File 20240516_043100_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-16T04:31:03.000.000.000 to 2024-05-16T04:31:03.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240516_043100_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02CC0180 03AA0140 027F01E0 01408110 03E0C190 0010A150 0218F1F0 03148900 029ECD80 03D1AB40 02397EE0
      02397EE0 0125C190 03B72150 006CB1F0 005AE900 00779D80 004C5340 02353D70 0197D1E0 035C3910 00F22590
      00F22590 028B3750 01CEACF0 0129FA80 01BD07C0 01638420 03D24630 023B6520 00936BD0 016D6F10 03DBD890
      03DBD890 003634D0 022D2EB0 033BB9E0 00A66510 02F55790 018FFC50 03480270 02EC0340 03CD0170 0115C0E0
      0115C0E0 039F2090 0050B0D0 0278E8B0 03449CE0 00E6D290 0295BBD0 01DF6630 0130D520 03A8BFB0 033E7030
      033E7030 0350A410 00F8F610 02848D10 01C6CB90 0325AE50 00B77970 00ECC5C0 009AA720 02D7F4B0 03BC0EE0
      03BC0EE0 023104C0 0394C350 005EA2F0 0071F380 00490A40 006D8F60 025B48D0 0176ECB0 01CD9AE0 032B5790
      032B5790 00BEFC50 0170C130 02E450D0 019678B0 015D44E0 03F3E690 000A15D0 020F1F30 030890A0 008CD8F0
      008CD8F0 00CAB480 00AFEEC0 027C0CD0 00A10550 02F187F0 03894400 024DE600 036B1500 02DE9F80 03B1D040
      03B1D040 02693860 015DA450
     
