-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun May 12 23:09:34 2024 UTC
-- File 20240512_080353_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-12T08:03:56.000.000.000 to 2024-05-12T08:03:56.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240512_080353_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03FFB040 02006860 01005C50 03807270 02404B40 03606EE0 00D05990 035C3AA0 007913F0 00459A00 00675700
      00675700 0054FC80 007E82C0 0041C3A0 02612270 0351B340 02F96AE0 0185DF90 03A39820 00392A10 0225BF10
      0225BF10 01376090 03ACD0D0 007AB8B0 0047E4E0 02641690 01561DD0 03FD1330 02039AA0 00812BF0 0060DF00
      0060DF00 0050B080 0078E8C0 00449CA0 0266D2F0 0355BB80 02FF6640 0380D560 0040BFD0 0260E030 03A84810
      03A84810 023E3600 03212D00 02B1BB80 03E96640 021DD560 01133FD0 039AA030 0257F020 017C0830 01C20C20
      01C20C20 01918510 03ACA3C0 027AF220 01478B30 01E44EA0 031669F0 029D5D00 03D3F380 023A0A40 03270F60
      03270F60 00B488D0 01776650 01E66AB0 01155FE0 039FF010 00500810 02780C10 01440A10 03E60F10 00150890
      00150890 021F8CD0 01104AB0 02CC37F0 01D51600 013F9D00 01A05380 01707A40 01C84760 032C64D0 00BA56B0
      00BA56B0 00E77DE0 0294C310 01DEA290 0398F9E0 022A4280 033F63C0 02A0D220 01F0BB30 0108E6A0 038C95F0
      038C95F0 024ADF00 036FB080
     
