-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri May 10 23:26:14 2024 UTC
-- File 20240510_204830_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-10T20:48:33.000.000.000 to 2024-05-10T20:48:33.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240510_204830_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  033BA600 02A67500 03F54F80 020FE840 03081C60 008C1250 02CA1B70 03AF16C0 02789DA0 00A269B0 0279AEB0
      0279AEB0 03A2BCF0 0273E280 034A13C0 02EF1A20 01989730 0154DCA0 03FEB2F0 0201EB80 03011E40 02819160
      02819160 02E0ACE0 02C87D40 03AC43E0 007A6210 02475310 0164FA90 03D687D0 003DC430 00232620 0232B530
      0232B530 032BEFA0 005F0C30 02384510 01246790 03B65450 006D7E70 005BC140 007621E0 024D3110 016BA990
      016BA990 03DE7D50 003143F0 0014F100 000F44C0 0008E6A0 020C95F0 030ADF00 028FB080 03C868C0 022C5CA0
      022C5CA0 013A72F0 01A74B80 0174EE40 02E74CB0 03CA7570 022F4FC0 0338E820 00A49C30 00F6D220 028DBB30
      028DBB30 03CB66A0 002ED5F0 0039BF00 00256080 001BE860 030B0E20 008E8930 00C9CDA0 02AD2B70 03FBBEC0
      03FBBEC0 020661A0 01055170 0187F9C0 01440520 03E607B0 030A8230 0347E190 00E41150 029619F0 03DD1500
      03DD1500 02339F80 032A5040 02BF7860 01E0C450 0310A670 0298F540 03EA47F0 010FB200 01886B00 014C5E80
      014C5E80 01EA71C0 011F4920
     
