-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri May 10 23:21:44 2024 UTC
-- File 20240510_172534_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-10T17:25:37.000.000.000 to 2024-05-10T17:25:37.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240510_172534_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0277B010 014C6810 03EA5C10 001F7210 0210CB10 0118AE90 03CA7CE0 0217A140 038E38F0 01249240 02DB6DB0
      02DB6DB0 03B6DB60 006DB6D0 025B6DB0 0376DB60 00CDB6D0 02AB6DB0 03FEDB60 0001B6D0 02016DB0 0380EDB0
      0380EDB0 03204DB0 02B06B60 01E85ED0 031C71B0 02924960 01DB6DD0 0336DB30 02ADB6A0 01FB6DF0 0106DB00
      0106DB00 00C2DB40 0251DB70 037936C0 02C5ADA0 01A77B70 0174C6C0 01CEA5A0 0329F770 02BD0CC0 03E38AA0
      03E38AA0 00124FF0 000DB400 0005B700 00076C80 0004DAC0 0006B7A0 0205EC70 03071A40 02849760 01C6DCD0
      01C6DCD0 0325B2B0 02B76BE0 02F66F00 01C6AC40 0125FA60 03B70750 006C84F0 005AC680 0077A5C0 004C7720
      004C7720 026A4CB0 035F6AE0 00F0DF90 03445820 00733A10 024AA710 016FF490 03D80ED0 003409B0 002E0D60
      002E0D60 02390BD0 01258E30 01B74920 036CEDB0 036D4DB0 036DF5B0 02DB0F60 01B688D0 036DCCB0 02DB2AE0
      02DB2AE0 01B6BF90 036DE050 00DB1070 00B69840 00EDD460 034D9F20 0075A850 024F7C70 0368C240 02DCA360
      02DCA360 01B2F2D0 036B8BB0
     
