-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri May 10 23:15:31 2024 UTC
-- File 20240510_123802_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-10T12:38:05.000.000.000 to 2024-05-10T12:38:05.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240510_123802_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  037B6C30 02C6DA20 01A5B730 01776CA0 03CCDAF0 022AB780 033FEC40 02A01A60 01F01750 01840E70 00A304A0
      00A304A0 01794370 00E2F160 029389D0 01DA4D30 01376BA0 03ACDE70 027AB140 0347E9E0 00E41D10 02961390
      02961390 01DD1A50 0199CBB0 02AA9730 03FFDCA0 000032F0 00002B80 00003E40 00002160 020031D0 01002930
      01002930 01803DA0 03402370 01701960 03E40AE0 00160F90 021D0850 01138C70 019A4A40 01576F60 03FCD8D0
      03FCD8D0 0002B4B0 0003EEE0 02021990 02818AA0 00E0A7F0 0090F400 00D88E00 00B4C900 00EEAD80 0099FB40
      0099FB40 00D506E0 02BF8590 01E04750 031064F0 014C2B40 02F51F70 038F90C0 024858A0 016C74F0 01DA4E80
      01DA4E80 013769C0 01ACDD20 037AB3B0 02C7EA60 01A41F50 01BB0870 00B34620 02EAE530 039F97A0 00505C70
      00505C70 00787240 00444B60 02666ED0 015559B0 01FFF560 03000FD0 00400410 03300300 02A80280 03FC03C0
      03FC03C0 02020220 01030330 018282A0 0343C3F0 02E22200 03933300 025AAA80 01BBFFE0 03B30000 026A8000
      026A8000 035FC000 02F02000
     
