-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri May 10 23:09:33 2024 UTC
-- File 20240510_082420_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-10T08:24:23.000.000.000 to 2024-05-10T08:24:23.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240510_082420_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00FB41D0 0286E130 03C591A0 00275970 0034F5C0 002E8F20 0239C8B0 03252CE0 00B7BA90 02EC67D0 019A5430
      019A5430 01577E20 03FCC130 0202A1A0 0103F170 00C104E0 0350C340 02F8A2E0 0184F390 03468A50 00E5CF70
      00E5CF70 009728C0 00DCBCA0 02B2E2F0 03EB9380 021E5A40 0388BBB0 03267330 02B54AA0 01EFEFF0 01181800
      01181800 01941400 015E1E00 01F11100 01099980 018D5540 014BFFE0 03F70000 01064000 01856000 0147D000
      0147D000 01E43800 01162400 019D3600 0153AD00 01FA7B80 01074640 0184E560 03A34BE0 02397700 0325CC80
      0325CC80 02B72AC0 03ECBFA0 001AE070 00179040 001C5860 02127450 011B4E70 0196E940 02AECEF0 01FCD4C0
      01FCD4C0 0102BEA0 0383E1F0 02421100 03631980 02D29540 03BBDFE0 00663010 02552810 017FBC10 03E03100
      03E03100 010814C0 018C1EA0 034A11F0 02EF1900 03989580 0254DF40 037EB0E0 00C1E890 02A11CD0 01F192B0
      01F192B0 0284ADF0 01E37D80 0112C340 019BA2E0 03567390 00FD4A50 0283EF70 03C218C0 022314A0 01329EF0
      01329EF0 01ABD180 00BF1CA0
     
