-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri May 10 23:07:29 2024 UTC
-- File 20240510_065945_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-10T06:59:48.000.000.000 to 2024-05-10T06:59:48.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240510_065945_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  024FF6A0 01680DF0 01DC0B00 01320E80 01AB09C0 017E8D20 01E0E5D0 01884B90 03A63720 00752CB0 004FBAE0
      004FBAE0 02686790 015C5450 03F27E70 020B4140 030EE1E0 00899110 02CD5990 02D5FAA0 00DF83F0 00B04200
      00B04200 00E86300 009C5280 00D27BC0 00BB4620 02E6E530 039597A0 005F5C70 0070F240 022445B0 039B33B0
      039B33B0 0256AA60 017DFF50 03C300F0 02228080 0333C0C0 02AA20A0 01FF30F0 0100A880 0180FCC0 02A04150
      02A04150 00F830F0 00842880 00C63CC0 00A522A0 02F7B3F0 038C6A00 024A5F00 036F7080 02D8C8C0 03B4ACA0
      03B4ACA0 00377D70 001661E0 021D5110 0113F990 039A0550 005707F0 007C8400 0042C600 0063A500 00527780
      00527780 007B4C40 02237530 039967D0 0055D430 007F3E20 0240A130 0360F1A0 00D08970 00B8CDC0 00E4AB20
      00E4AB20 0296FEB0 03DD81E0 0219A080 018AB860 034FE450 00E81670 009C1D40 00D213E0 02BB1A10 01E69710
      01E69710 0315DC90 009F32D0 02D0ABB0 03DC7F30 03192050 0095B070 00DF6840 00B0DC60 02E8B250 019CEB70
      019CEB70 01529EC0 01FBD1A0
     
