-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu May  9 23:14:23 2024 UTC
-- File 20240509_111559_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-09T11:16:02.000.000.000 to 2024-05-09T11:16:02.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240509_111559_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  027B34D0 0146AEB0 01E5F9E0 03170510 009C8790 02D2C450 01BBA670 01667540 02EAA7F0 039FF400 02500E00
      02500E00 03780900 02C40D80 03A60B40 02750EE0 014F8990 03E84D50 001C6BF0 00092F00 0006DC40 0005B260
      0005B260 02076B50 0104DEF0 0186B180 0145E940 01E71DE0 03149310 009EDA90 02D1B7D0 00DCB610 03597680
      03597680 02F5CDC0 038F2B20 0048BEB0 006CE1E0 025A9110 0177D990 03CC3550 002A2FF0 003F3800 00105200
      00105200 000C3D80 000A2340 000F32E0 0208AB90 010CFE50 038A8170 024FC1C0 03682120 00DC31B0 00B22960
      00B22960 03759EE0 0267A8C0 03547CA0 00FE42F0 00816380 00C1D240 00A13B60 02F1A6D0 018975B0 014DCF60
      014DCF60 03EB28D0 000F5E50 010478B0 018644E0 03456690 00E7D5D0 02943F30 03DE20A0 003130F0 0029A880
      0029A880 003D7CC0 0023C2A0 011911F0 00CACC80 00AFAAC0 00F87FA0 02844070 03C66040 02255060 0137F850
      0137F850 03AC0470 027A0640 03470560 027243E0 02A5B100 03F76980 020CDD40 030AB3E0 008FEA10 02C81F10
      02C81F10 01AC1090 037A18D0
     
