-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu May  9 23:07:32 2024 UTC
-- File 20240509_062824_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-09T06:28:27.000.000.000 to 2024-05-09T06:28:27.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240509_062824_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0134FC50 03AE8270 0279C340 034522E0 0273D9C0 03A51A90 023BCBE0 01262E10 03B53910 006FA590 02587750
      02587750 01744CF0 01CE6A80 01295FC0 01BDF020 03630830 03694610 026EF280 03598BC0 02F54E20 018FE930
      018FE930 01481DA0 03EC1370 021A1AC0 031717A0 009C9C70 00D2D240 025DDDB0 03B999B0 02655560 0157FFD0
      0157FFD0 03FC0030 02020020 01030030 01828020 0343C030 02E22020 01933030 02AD5410 02FDFF00 03830080
      03830080 024280C0 0363C0A0 00D220F0 00BB3080 00E6A8C0 0095FCA0 02DF02F0 03B08380 01346120 01D728D0
      01D728D0 033CBCB0 02A2E2E0 01F39390 030A5A50 008F7770 00C8CCC0 00ACAAA0 02FAFFF0 03878000 01222000
      01222000 00D99800 00B55400 00EFFE00 00980100 00D40180 00BE0140 00E101E0 02918110 01D94190 0335E150
      0335E150 005788F0 003E2640 00213560 0231AFD0 01297830 01BDC420 03632630 02D2B520 01BBEFB0 01661860
      01661860 03D51450 001FCF30 02081450 010C1E70 018A1140 014F19E0 03E89510 001CDF90 0212B050 011BE870
      011BE870 01961C40 015D1260
     
