-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun May  5 23:27:41 2024 UTC
-- File 20240505_211729_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-05T21:17:32.000.000.000 to 2024-05-05T21:17:32.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240505_211729_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  003B6200 0026D300 0035BA80 002F67C0 0038D420 01125F10 039B7090 0056C8D0 027DACB0 03437AE0 00E2C790
      00E2C790 0293A450 01DA7670 01374D40 01ACEBE0 03BD4F00 0131F440 01A90E60 037D8950 00C34DF0 00A2EB00
      00A2EB00 00F39E80 008A51C0 00CF7920 02A8C5B0 03FCA760 02017A60 0280E3A0 01C09270 0120DB40 01B0B6E0
      01B0B6E0 0368ED90 00DC9B50 02B2D6F0 03EBBD80 021E6340 031152E0 024CFDC0 03B54190 006FE150 025811F0
      025811F0 03741900 02CE1580 03A91F40 027D90E0 01435890 03E2F4D0 00138EB0 020D24F0 0185DB40 014736E0
      014736E0 03E4AD90 0016FB50 021D86F0 03134580 029AE740 03D794E0 003C5E90 022271D0 0099A490 036ABB60
      036ABB60 00DFE6D0 02B015B0 03E81F60 001C10D0 021218B0 031B14E0 00969E90 02DDD1D0 01B33930 02B552D0
      02B552D0 00F7FDD0 028C0330 03CA02A0 002F03F0 00388200 0024C300 0036A280 002DF3C0 003B0A20 02268F30
      02268F30 039AE450 002BCB30 003E2EA0 022139F0 0331A500 02A97780 03FDCC40 02032A60 0102BF50 0383E0F0
      0383E0F0 02421080 01B18C60
     
