-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun May  5 23:22:22 2024 UTC
-- File 20240505_172042_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-05T17:20:45.000.000.000 to 2024-05-05T17:20:45.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240505_172042_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03D8D440 0234BE60 012EE150 01DCC8F0 00995640 026AFEB0 035F81E0 00F04110 02886190 01CC5150 032A79F0
      032A79F0 02BF4500 03E0E780 02109440 0318DE60 024A58A0 00B7BA70 00EC6740 009A54E0 02D77E90 01BCC1D0
      01BCC1D0 0362A130 02D3F1A0 01BA0970 01670DC0 01D48B20 019F6750 01A86A70 017C5F40 01C270E0 03234890
      03234890 00B2ECD0 02EB9AB0 039E57E0 00517C10 0279C210 01452310 03F3D940 03051AF0 02879780 03C45C40
      03C45C40 02267260 01354B50 03AFEEF0 02781980 03441540 02E61FE0 01951010 03AFCC00 013C1500 01A21F80
      01A21F80 01731040 01CA9860 032FD450 00B83E70 00E42140 009631E0 02DD2910 01B3BD90 03B531A0 0037D4B0
      0037D4B0 002C3EE0 023A2190 01273150 03B4A9F0 026EFD00 03598380 02F54240 038FE360 004812D0 01360DD0
      01360DD0 01D68590 033DC750 00A324F0 00F2B680 008BEDC0 00CE1B20 02A916B0 03FD9DE0 00035310 0202FA90
      0202FA90 0281C3E0 02E09100 0390D980 0258B540 0374EFE0 00CE9810 02A9D410 01FD3E10 0303A110 00827190
      00827190 02C34950 00D176F0
     
