-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun May  5 23:20:48 2024 UTC
-- File 20240505_161302_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-05T16:13:05.000.000.000 to 2024-05-05T16:13:05.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240505_161302_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  027401D0 014E0130 01E901A0 031D8170 029341C0 03ED7090 020DE460 02858B20 00E3A750 01493A70 01EDA740
      01EDA740 011B74E0 0396CE90 005DA9D0 02737D30 034AC3A0 00EFA270 00987340 00D44AE0 035F37C0 03785610
      03785610 00C47D10 02A64390 01F56250 030FD370 02883AC0 03CC27A0 002A3470 003F2E40 0020B960 031872E0
      031872E0 024A25C0 036F3720 00D8ACB0 00B4FAE0 02EE8790 0199C450 03552670 02FFB540 03806FE0 00405810
      00405810 03303A00 01541380 01FE1A40 01011760 03819CD0 004152B0 0061FBE0 02510610 01798510 03C54790
      03C54790 0027E450 011A0B30 02CB8750 01AE44F0 01796680 01C5D5C0 01273F20 03B4A0B0 026EF0E0 01598890
      01598890 03F54CD0 000FEAB0 02040FF0 01830400 01428600 01E3C500 01122780 019B3440 0156AE60 03FDF950
      03FDF950 000305F0 00028700 0003C480 00011360 0300CD60 0080ABD0 02C0FE30 03A08120 0070C1B0 0048A160
      0048A160 026CF1D0 015A8930 01F7CDA0 030C2B70 01451F60 03F3C860 000A2C50 020F3A70 0308A740 028CF4E0
      028CF4E0 01CA8E90 032FC9D0
     
