-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun May  5 23:08:38 2024 UTC
-- File 20240505_072840_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-05-05T07:28:43.000.000.000 to 2024-05-05T07:28:43.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240505_072840_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  033A1930 02A715A0 01F49F70 010ED0C0 0189B8A0 034D64F0 02EBD680 039E3DC0 02512320 0179B2B0 02E2B5F0
      02E2B5F0 01C9F780 012D0C40 01BB8A60 03664F50 00D568F0 00BFDC80 00E032C0 00902BA0 02D83E70 03B42140
      03B42140 033718F0 01564A40 01FD6F60 0303D8D0 008234B0 00C32EE0 02A2B990 01F3E550 030A17F0 028F1C00
      028F1C00 03C89200 01166D80 00CEADA0 02A9FB70 03FD06C0 020385A0 01024770 018364C0 0142D6A0 03E3BDF0
      03E3BDF0 02126300 031B5280 014B7DE0 03F76180 020CD140 030AB9E0 008FE510 02C81790 01AC1C50 037A1270
      037A1270 02C71B40 03A496E0 0076DD90 0326D9A0 005ADAB0 0077B7E0 024C6C10 016A5A10 03DF7710 0030CC90
      0030CC90 0228AAD0 013CFFB0 01A28060 0373C050 00651030 022BCC10 013E2A10 03A13F10 0071A090 024970D0
      024970D0 016DC8B0 01DB2CE0 0336BA90 00ADE7D0 02FB1430 03C34F10 02117440 0319CE60 00952950 02DFBDF0
      02DFBDF0 03B06300 02685280 035C7BC0 02F24620 018B6530 014ED7A0 01F4DE30 02875890 01C4F4D0 03268EB0
      03268EB0 02B5C9E0 01EF2D10
     
