-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Apr 30 23:17:19 2024 UTC
-- File 20240430_131859_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-30T13:19:02.000.000.000 to 2024-04-30T13:19:02.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240430_131859_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02A5A290 01F773D0 030CCA30 03455790 00E7FC50 02940270 03DE0340 023102E0 01298390 03BD4250 0063E370
      0063E370 005212C0 007B1BA0 01234B30 02D97750 01B5CCF0 016F2A80 01D8BFC0 0134E020 03AE9030 0279D820
      0279D820 01453430 01E7AE20 03147930 034F22D0 007459D0 024E7530 03694FA0 00DDE870 00B31C40 00EA9260
      00EA9260 029FDB50 01D036F0 01382D80 01A43B40 02BB1370 01F34D60 030AEBD0 008F9E30 00C85120 02AC79B0
      02AC79B0 03FA4560 000767D0 0204D430 0306BE20 0085E130 026388D0 00A92650 02FDB570 03836FC0 0242D820
      0242D820 0163B430 01D26E20 033B5930 02A6F5A0 01F58F70 010F48C0 02C47650 00D326B0 00BAB5E0 02E7EF10
      02E7EF10 01941890 035E14D0 00F11EB0 008991E0 02CD5910 01ABF590 037E0F50 00608470 00286320 023C52B0
      023C52B0 03227BE0 00B34610 02EAE510 019F9790 03505C50 00F87270 00844B40 00C66EE0 0352ACC0 037DFD50
      037DFD50 00C303F0 00A28200 00F3C300 008A2280 00CF33C0 00A8AA20 02FCFF30 038280A0 0043C0F0 00311040
      00311040 0214CC30 031EAA20
     
