-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Apr 30 00:39:35 2024 UTC
-- File 20240430_002052_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-30T00:20:55.000.000.000 to 2024-04-30T00:20:55.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240430_002052_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  027AD760 0147BCD0 03E462B0 021653E0 011D7A10 0393C710 022D1240 039DCDB0 032995B0 035EAFB0 0378FC30
      0378FC30 02C48220 01A6C330 0175A2A0 03CF73F0 0228CA00 033CAF00 02A2F880 03F384C0 020A46A0 0087B2F0
      0087B2F0 006235C0 00532F20 027AB8B0 0347E4E0 00E41690 02961DD0 01DD1330 01339AA0 03AA57F0 027F7C00
      027F7C00 01A06100 00B828C0 00E43CA0 029622F0 03DD3380 0233AA40 032A7F60 00BF40D0 02E0E0B0 039090E0
      039090E0 0058D890 033A5A60 0253BBA0 017A6670 01C75540 0124FFE0 03B68010 006DC010 025B2010 0176B010
      0176B010 03CDE810 002B1C10 031F4900 014876C0 01EC4DA0 031A6B70 02975EC0 03DCF1A0 00328970 002BCDC0
      002BCDC0 003E2B20 02213EB0 0331A1E0 0254B880 01BF7260 0360CB50 00D0AEF0 00B8F980 00E48540 0096C7E0
      0096C7E0 02DDA410 01B37610 036ACD10 00DFAB90 03583F20 007A1050 02471870 03649440 02D6DE60 01BDB150
      01BDB150 036369F0 02D2DD00 03BBB380 02666A40 03555F60 027FF860 02A00220 01F00330 010802A0 038C03F0
      038C03F0 024A0200 036F0300
     
