-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Apr 30 00:22:19 2024 UTC
-- File 20240430_000357_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-30T00:04:00.000.000.000 to 2024-04-30T00:04:00.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240430_000357_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02A91C00 01FEC900 0080D6C0 02605ED0 00A838D0 02FC24B0 038236E0 00432D90 0262BB50 0153E6F0 01FA1580
      01FA1580 01071F40 018490E0 0346D890 0272DA60 02A5DBA0 01F73670 010CAD40 018AFBE0 034F8610 00E84510
      00E84510 029C6790 01D25450 033B7E70 02A6C140 03FAD0F0 0103DC40 01823260 03432B50 00E2BEF0 0093E180
      0093E180 00DA1140 00B719E0 02EC9510 019ADF90 0357B050 007E3430 02209710 0130DC90 03A8B2D0 007CEBB0
      007CEBB0 00429E60 0263D150 015239F0 01FB2500 0106B780 0185EC40 02A38D30 03F925D0 0005B730 00076CA0
      00076CA0 0204DAF0 0306B780 0285EC40 03C71A60 00249750 0236DCF0 032DB280 015DB5E0 03F9B780 02056C40
      02056C40 0307DA60 00843750 02C62CF0 03A53A80 0277A7C0 034C7420 00EA4E30 009F6920 01686ED0 01EE2CD0
      01EE2CD0 03193AB0 0295A7E0 01DF7410 0330CE10 00A8A910 02FCFD90 01828350 0343C2F0 02E22380 01C99920
      01C99920 0196AAD0 035DFFB0 02F30060 018A8050 034FC070 02E82040 039C3060 00522850 027B3C70 0346A240
      0346A240 0372F9B0 0365C2B0
     
