-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Apr 28 23:25:01 2024 UTC
-- File 20240428_200946_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-28T20:09:49.000.000.000 to 2024-04-28T20:09:49.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240428_200946_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02948CA0 01DECAF0 0131AF80 01A97840 017DC460 03C32650 0022B570 0033EFC0 002A1820 011F8A10 03C82780
      03C82780 01161A20 01CE8B90 0329CE50 00BD2970 00E3BDC0 00926320 02DB52B0 03B6FBE0 006D8610 025B4510
      025B4510 0176E790 03E6CA20 000AD790 020FBC50 01086270 018C5340 014A7AE0 03EF4790 0018E450 02149670
      02149670 031EDD40 0291B3E0 02ECB500 01CD77C0 012BCC20 03BE2A30 02613F20 0151A0B0 01F970E0 0305C890
      0305C890 00872CD0 02C4BAB0 03A6E7E0 023ACA00 0193D780 015A3C40 01F72260 030CB350 008AEAF0 00CF9F80
      00CF9F80 00A85040 00FC7860 02824450 01C36670 00916AA0 016CEFF0 01DA9800 0137D400 01AC3E00 017A2100
      017A2100 01C73180 0124A940 01B6FDE0 036D8310 00DB4290 035B71E0 027B6480 0346D6C0 02E5BDA0 01976370
      01976370 015CD2C0 01F2BBA0 030BE670 028E1540 03C91FE0 002D9010 031DAC00 0149BD00 01ED6380 011BD240
      011BD240 01963B60 035D26D0 00F3B5B0 008A6F60 02CF58D0 01A8F4B0 017C8EE0 03E164C0 0308EB50 008C9EF0
      008C9EF0 00CAD180 00AFB940
     
