-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Apr 28 23:13:27 2024 UTC
-- File 20240428_110848_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-28T11:08:51.000.000.000 to 2024-04-28T11:08:51.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240428_110848_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02E570F0 0397C880 025C2CC0 03723AA0 00CB27F0 00AEB400 00F9EE00 00428C80 0031E560 03148BE0 009ECE10
      009ECE10 02D1A910 01B97D90 0365C350 00D722F0 00BCB380 00E2EA40 00939F60 02DA50D0 00DBBC50 015B3130
      015B3130 01F6A9A0 030DFD70 028B03C0 03CE8220 0029C330 003D22A0 0223B3F0 03326A00 02AB5F00 01FF7840
      01FF7840 02806230 03C05320 00207AB0 003047E0 02286410 013C5610 03A27D10 00734390 024AE250 016F9370
      016F9370 00EC2D60 034D1DE0 00EB9310 029E5A90 01D177D0 0339CC30 02A52A20 01F7BF30 010C60A0 038A50F0
      038A50F0 024F7880 01B46260 03B729A0 006CBD70 005AE3C0 00779220 024C5B30 036A76A0 00DF4DF0 00B0EB00
      00B0EB00 00E89E80 009CD1C0 02695C90 02AEF960 01F985D0 03054730 0287E4A0 01C416F0 01261D80 01B51340
      01B51340 016F9AE0 03D85790 00347C50 01172130 02CE58D0 01A974B0 017DCEE0 03C32990 0022BD50 0233E3F0
      0233E3F0 032A1200 02BF1B00 03E09680 0210DDC0 038C5990 02253AA0 0137A7F0 01AC7400 017A4E00 01C76900
      01C76900 0124DD80 01B6B340
     
