-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Apr 28 23:09:52 2024 UTC
-- File 20240428_083633_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-28T08:36:36.000.000.000 to 2024-04-28T08:36:36.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240428_083633_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  032E8F10 00B9C890 02E52CD0 0197BAB0 015C67E0 03F25410 000B7E10 020EC110 0109A190 038D7150 0025E4F0
      0025E4F0 001B8B40 00164EE0 021D6990 0113DD50 039A33F0 02572A00 037CBF00 02C2E080 03A390C0 027258A0
      027258A0 00A5BA70 007BB3A0 02466A70 03655F40 02D7F0E0 01BC0890 03620CD0 00D30AB0 00BA8FE0 02E7C810
      02E7C810 01942C10 03AF1D00 013C49C0 01A26D20 03735BB0 02CAF660 01AF8D50 03784BF0 02C46E00 03A65900
      03A65900 02757580 034FCF40 03741470 01670F20 03D488B0 023ECCE0 0121AA90 03B17FD0 0069C030 005D2020
      005D2020 0273B030 034A6820 00EF5C30 024C7910 02B522C0 03EFB3A0 00186A70 00145F40 001E70E0 02114890
      02114890 0119ECD0 03951AB0 025F97E0 01705C10 03E43900 010B12C0 018E9BA0 0349D670 02ED3D40 039BA3E0
      039BA3E0 00567210 027D4B10 0143EE90 03E219D0 00131530 020D4FD0 0085F410 02C70E10 01A48910 0376CD90
      0376CD90 00CDAB50 02AB7EF0 03FEC180 0201A140 030171E0 0081C910 036096C0 03686ED0 00DC59B0 00B27560
      00B27560 02EB4FD0 019EE830
     
