-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Apr 28 23:05:50 2024 UTC
-- File 20240428_054729_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-28T05:47:32.000.000.000 to 2024-04-28T05:47:32.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240428_054729_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  038E5440 02497E60 016DC150 03DB21F0 0236B100 032DE980 02BB1D40 03E693E0 0015DA10 021F3710 0110AC90
      0110AC90 0398FAD0 005487B0 007EC460 0320D320 00585D50 027473F0 034E4A00 02E96F00 039DD880 025334C0
      025334C0 037AAEA0 00C7F9F0 00A40500 00F60780 00468220 0132E190 03AB9150 007E59F0 00417500 0061CF80
      0061CF80 00512840 0079BC60 02456250 0167D370 01D43AC0 029F13D0 00E84D10 029C6B90 01D25E50 033B7170
      033B7170 02A6C9C0 03F5AD20 000F7BB0 0008C660 020CA550 010AF7F0 00C7C600 00521280 007B1BC0 00469620
      00469620 0265DD30 035733A0 00FCAA70 0082FF40 00C380E0 02A24090 01F360D0 01856850 01A3EE30 01721920
      01721920 03CB15B0 022E9F60 0139D0D0 03A538B0 0277A4E0 014C7690 03EA4DD0 001F6B30 02086F50 00862C70
      00862C70 00C53A40 00A7A760 02F474D0 018E4EB0 014969E0 03EDDD10 001B3390 0216AA50 011DFF70 00C98060
      00C98060 0356A020 00FDF030 00830820 02C28C30 03A3CA20 00722F30 004B38A0 026EA4F0 0359F680 02F50DC0
      02F50DC0 03C7C590 021213A0
     
