-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Apr 27 23:24:49 2024 UTC
-- File 20240427_190502_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-27T19:05:05.000.000.000 to 2024-04-27T19:05:05.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240427_190502_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01A464E0 03765690 00CD7DD0 02ABC330 03FE22A0 000133F0 0000D500 00005FC0 02003810 01002410 03803610
      03803610 00402D10 02603B90 01502650 03F83570 02042FC0 03063820 00852430 0263DB10 02A91B40 03FD96E0
      03FD96E0 00035D90 0202F350 01038AF0 01824F80 01436840 01E2DC60 0313B250 009A6B70 006BAF60 032F3C60
      032F3C60 00B8A250 02E4F370 03968AC0 025DCFA0 01732870 01CABC40 012FE260 03B81350 00641AF0 002B0BC0
      002B0BC0 021F4710 0110E490 039896D0 0054DDB0 007EB360 0241EAD0 01611FB0 01D19060 03395850 00A5F470
      00A5F470 007B8720 01232250 03B2B370 026BEAC0 035E1FA0 00F11070 00899840 00CD5460 02ABFE50 01FE0170
      01FE0170 010101C0 02C0C090 02D05060 01B87850 03644470 02D66640 03BD5560 0063FFD0 02520030 037B0020
      037B0020 00C68030 00A5C020 017B9010 03E32C00 0212BA00 031BE700 02961480 03DD1EC0 023391A0 012A5970
      012A5970 01BF75C0 0160CF20 03D0A8B0 031C7E70 014920A0 03EDB0F0 021B6880 0316DCC0 029DB2A0 01D36BF0
      01D36BF0 013ADE00 01A7B100
     
