-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Apr 27 23:23:55 2024 UTC
-- File 20240427_181421_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-27T18:14:24.000.000.000 to 2024-04-27T18:14:24.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240427_181421_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01C48750 0326C4F0 015AD340 02FBDD70 038633C0 02452A20 0167BF30 01D460A0 033E50F0 02A17880 03F1C4C0
      03F1C4C0 020926A0 010DB5F0 00C5B780 0053B620 027A6D30 03475BA0 00E4F670 00968D40 00DDCBE0 02B32E10
      02B32E10 01EAB910 031FE590 00901750 016C0E70 00ED04A0 029B86F0 03D64580 023D6740 0323D4E0 00B23E90
      00B23E90 02EB21D0 019EB130 0151E9A0 03F91D70 0102C9E0 03C1D680 02213DC0 0331A320 00A972B0 00FDCBE0
      00FDCBE0 02832E10 01C2B910 0323E590 00B21750 02EB1CF0 01CF4940 029476F0 03DE4D80 02316B40 0329DEE0
      0329DEE0 00BD3190 02E3A950 01927DF0 015B4300 01F6E280 010D93C0 02C5AD10 02D3BDC0 03BA6320 006752B0
      006752B0 0054FBE0 027E8610 0141C510 03E12790 0011B450 02196E70 0315D940 034F9AF0 01742BC0 01CE3E20
      01CE3E20 03292130 02BDB1A0 01E36970 0112DDC0 019BB320 03566AB0 02FD5FE0 0183F010 03A10400 0138C300
      0138C300 01A4A280 0176F3C0 01CD8A20 032B4F30 02BEE8A0 01E19CF0 01115280 0199FBC0 01550620 01FFC290
      01FFC290 038011E0 00401910
     
