-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Apr 27 23:21:34 2024 UTC
-- File 20240427_163251_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-27T16:32:54.000.000.000 to 2024-04-27T16:32:54.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240427_163251_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02B7CF70 03EC28C0 021A3CA0 011722F0 019CB380 0152EA40 01FB9F60 030650D0 0042BC50 0263E270 03521340
      03521340 02FB1AE0 01869790 0345DC50 00E73270 0094AB40 00DEFEE0 02B18190 02F4A0A0 00C77870 00A4C440
      00A4C440 00F6A660 028DF550 01CB0FF0 012E8800 01B9CC00 01652A00 01D7BF00 013C6080 00D12860 035CDE20
      035CDE20 00F2B130 008BE9A0 02CE1D70 03A913C0 027D9A20 01435730 01E2FCA0 031382F0 029A4380 01EBB120
      01EBB120 018F34D0 0348AEB0 02ECF9E0 019A8510 0357C790 00FC2450 02823670 03C32D40 0222BBE0 0133E610
      0133E610 03D50A80 011FC7E0 03902410 00583610 02742D10 014E3B90 03E92650 001DB570 00136FC0 001AD820
      001AD820 0217B430 038E3710 02249640 0336DD60 00ADB3D0 02FB6A30 0386DF20 0045B0B0 006768E0 0254DC90
      0254DC90 017EB2D0 03C1EBB0 03108F30 034C6450 00EA5670 009F7D40 00D0C3E0 02B8A210 01E4F310 03168A90
      03168A90 009DCFD0 02D32830 03BABC20 0033F110 031504C0 029F86A0 01D045F0 01386700 01A45480 01767EC0
      01767EC0 01CD41A0 032BE170
     
