-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Apr 27 23:20:22 2024 UTC
-- File 20240427_154206_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-27T15:42:09.000.000.000 to 2024-04-27T15:42:09.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240427_154206_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00F2D980 008BB540 00CE6FE0 0354AC00 017F7D00 01C0C380 0120A240 01B0F360 03688AD0 00DCCFB0 00B2A860
      00B2A860 02EBFC50 019E0270 01510340 02FCC170 01C150E0 0321F890 00B104D0 02E986B0 039D45E0 0053E710
      0053E710 027A1490 01471ED0 03E491B0 0216D960 028EDAE0 02E4DBC0 0396B620 005DED30 00731BA0 024A9670
      024A9670 036FDD40 02D833E0 01B42A10 036E3F10 00D92090 035AD860 027BDA20 01463730 01E52CA0 0317BAF0
      0317BAF0 029C6780 03D25440 023B7E60 0126C150 03B5A1F0 026F7100 01AC64C0 02BD2B50 01E3BEF0 01126180
      01126180 019B5140 0156F9E0 03FD8510 00034790 0202E450 01039670 01825D40 02A1B9F0 01F8B280 0104EBC0
      0104EBC0 01869E20 0345D130 02E739A0 0194A570 015EF7C0 01F18C20 03094A30 028DEF20 00E58C50 014BA530
      014BA530 01EE77A0 03194C70 0295EA40 03DF1F60 003090D0 0228D8B0 033CB4E0 00A2EE90 02F399D0 00C52A90
      00C52A90 0353DFE0 00FA3010 02872810 01C4BC10 0326E210 00B59310 02EF5A90 0198F7D0 03548C30 02FECA20
      02FECA20 00C0D790 03505E20
     
