-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Apr 27 23:18:49 2024 UTC
-- File 20240427_143426_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-27T14:34:29.000.000.000 to 2024-04-27T14:34:29.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240427_143426_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  029308C0 03DA8CA0 001BE570 000B0BE0 03074700 01427240 02F1A5B0 03897760 004DCCD0 026B2AB0 035EBFE0
      035EBFE0 00F1E010 02891010 01CD9810 032B5410 00BEFE10 0370C080 01645060 03D67850 003D4470 0023E640
      0023E640 00321560 022B1FD0 013E9030 01A1D820 03713430 02C9AE20 00D6BC90 035EF160 00F189D0 02894D30
      02894D30 03CDEBA0 002B1E70 003E9140 0021D9E0 02313510 0129AF90 03BD7850 0031E230 02148990 011ECD50
      011ECD50 0391ABF0 02597E00 0375C100 02CF2180 03A8B140 027CE9E0 01429D10 03E3D390 02091D20 0086C9D0
      0086C9D0 02C5AD30 03A77BA0 0074C670 004EA540 0069F7E0 025D0C10 01738A10 03CA4F10 002F6890 031C6E60
      031C6E60 02492CA0 016DBAF0 01DB6780 0136D440 01ADBE60 037B6150 00C6D1F0 00A5B900 00F76580 008CD740
      008CD740 02655E70 01ABF8A0 037E04F0 02C10680 03A185C0 02714720 0149E4B0 01ED16E0 031B9D90 00965350
      00965350 02DD7AF0 01D9E3C0 029A8910 01D7CD90 033C2B50 00A23EF0 00F32180 008AB140 00CFE9E0 02A81D10
      02A81D10 01FC1390 03021A50
     
