-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Apr 27 23:16:08 2024 UTC
-- File 20240427_123601_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-27T12:36:04.000.000.000 to 2024-04-27T12:36:04.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240427_123601_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01C344B0 02917370 01ECE560 031A97D0 0097DC30 00DC3220 02B22B30 03EB3EA0 001EA1F0 0011F100 00190980
      00190980 00158D40 020FA5F0 01843B80 01462640 01E53560 0317AFD0 009C7830 00D24420 02BB6630 03E6D520
      03E6D520 0015BFB0 001F6060 03086820 00462E10 02653910 0157A590 03FC7750 00024CF0 00036A80 0002DFC0
      0002DFC0 0003B020 02026830 03035C20 00417910 0330E2C0 02A893A0 01FCDA70 0102B740 0183ECE0 03421A90
      03421A90 00E317D0 02929C30 03DBD220 00363B30 02169350 008EED70 00C99BC0 00AD5620 02FBFD30 038603A0
      038603A0 00450270 00678340 005442E0 027E6390 01415250 01F0FDB0 028441B0 03C66160 002551D0 0237F930
      0237F930 032C05A0 00BA0770 00E704C0 009486A0 02DEC5F0 03B1A700 0134BA40 02D773B0 03BCCA60 0062AF50
      0062AF50 0253F8F0 037A0480 02C706C0 03A485A0 0076C770 004DA4C0 006B76A0 012F66F0 00DC6AC0 00B25FA0
      00B25FA0 02EB7070 039EC840 0251AC60 01797A50 03C5C770 022724C0 0334B6A0 00AEEDF0 007CCD80 002155A0
      002155A0 0231FF70 032900C0
     
