-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Apr 27 23:08:58 2024 UTC
-- File 20240427_073134_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-27T07:31:37.000.000.000 to 2024-04-27T07:31:37.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240427_073134_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00C6B4C0 00A5EEA0 02F719F0 038C9500 024ADF80 036FB040 02D86860 02DA2E20 01B73930 016CA5A0 03DAF770
      03DAF770 02378CC0 032C4AA0 00BA6FF0 00E75800 0094F400 00DE8E00 0058E480 003A4B60 02276ED0 0134D9B0
      0134D9B0 01AEB560 0379EFD0 00C51830 00A79420 02F45E30 038E7120 004949B0 0236F6B0 0396C6F0 025DA580
      025DA580 03737740 02CACCE0 01AFAA90 03787FD0 00C44030 00A66020 02F55030 038FF820 00240210 031B0180
      031B0180 02968140 03DDC1E0 00332110 022AB190 013FE950 03A01DF0 02701300 03481A80 02EC17C0 03CD0E10
      03CD0E10 0215C480 031F26C0 0290B5A0 01D8EF70 013498C0 01AED4A0 0379BEF0 02C56180 03A7D140 027439E0
      027439E0 02A71280 01FA4DE0 03076B10 0084DE90 02C6B1D0 01A5E930 01771DA0 03CC9370 022ADAC0 033FB7A0
      033FB7A0 00A06C70 00782D20 01221DD0 03B31330 026A9AA0 015FD7F0 01F03C00 01082200 018C3300 014A2A80
      014A2A80 01EF3FC0 0118A020 01CA7810 0397A200 025C7300 03724A80 02CB6FC0 03AED820 0079B430 00456E20
      00456E20 0267D930 035435A0
     
