-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Apr 27 23:06:31 2024 UTC
-- File 20240427_055004_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-27T05:50:07.000.000.000 to 2024-04-27T05:50:07.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240427_055004_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01E4E020 03169030 029DD820 01D33430 013AAE20 03A7F930 033A02D0 00A703B0 00F48260 028EC350 01C9A2F0
      01C9A2F0 012D7380 01BBCA40 01662F60 03D538D0 003FA4B0 02103B70 018C1360 034A1AD0 00EF17B0 00989C60
      00989C60 02D4D250 01BEBB70 0161E6C0 01D115A0 03399F70 02A550C0 03FBFC50 00030130 000281A0 0203C170
      0203C170 030221C0 02833120 01C2A9B0 0123FD60 03B203D0 006B0230 005E8320 0138E150 01D248F0 013B6C80
      013B6C80 01A6DAC0 0175B7A0 03CF6C70 0228DA40 033CB760 00A2ECD0 02F39AB0 038A57E0 0227BE00 019A3080
      019A3080 015728C0 01FCBCA0 0302E2F0 02839380 03C25A40 02237760 0132CCD0 03ABAAB0 027E7FE0 02A0A000
      02A0A000 01F87800 01044400 01866600 01455500 01E7FF80 01140040 019E0060 03510050 00F98070 00854040
      00854040 0263F030 03A90410 007D8610 02434510 0162E790 03D39450 003A5E70 00277140 0034C9E0 022EAD10
      022EAD10 0139FB90 03D28320 001DE150 021311F0 031A9900 0297D580 03DC3F40 023220E0 012B3090 03BEA8D0
      03BEA8D0 0061FCB0 005102E0
     
