-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Apr 27 23:04:46 2024 UTC
-- File 20240427_042532_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-27T04:25:35.000.000.000 to 2024-04-27T04:25:35.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240427_042532_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01FF3DB0 0100A360 0380F2D0 00408BB0 0060CE60 0250A950 0178FDF0 01C48300 0126C280 01B5A3C0 02B7B910
      02B7B910 01EC6590 031A5750 00977CF0 00DCC280 00B2A3C0 00EBF220 029E0B30 03D10EA0 003989F0 0012A680
      0012A680 000DFAE0 020B0790 010E8450 0389C670 024D2540 036BB7E0 00DE6C10 02B15A10 01E9F710 031D0C90
      031D0C90 0249C560 02B693E0 01EDDA10 031B3710 0096AC90 02DDFAD0 01B307B0 016A8460 03DFC650 00302570
      00302570 002837C0 021E1610 02888E80 03CCC9C0 022AAD20 013FFBB0 01A00660 03700550 00C807F0 00AC0400
      00AC0400 00FA0600 00870500 006243C0 0229B110 013D6990 03A3DD50 007233F0 004B2A00 006EBF00 0059E080
      0059E080 007510C0 004F98A0 026854F0 01AE3F40 02BC9070 03E2D840 0213B460 011A6E50 03975970 025CF5C0
      025CF5C0 03728F20 00CBC8B0 00AE2CE0 02F93A90 02C2D3E0 02D1DD00 03B93380 0265AA40 03577F60 00FCC0D0
      00FCC0D0 0282A0B0 03C3F0E0 00220890 02330CD0 012A8AB0 02DFE7F0 01D80A00 01340F00 01AE0880 01790CC0
      01790CC0 01C58AA0 03274FF0
     
